1. Field of the Invention
The invention relates to a semiconductor module.
2. Description of Related Art
When a semiconductor element generates heat, the semiconductor element and members there around (solder and wiring and the like) thermally expand. Stress is applied to the semiconductor element due to a difference in the thermal expansion rates (i.e., the coefficient of thermal expansion) of the members. Such stress shortens the life of the semiconductor element. In order to reduce this kind of stress, connecting a semiconductor element to wiring without using joining by brazing filler metal such as solder is being examined. For example, Japanese Patent Application Publication No. 9-252067 (JP 9-252067 A) describes a semiconductor module in which a semiconductor element is stacked together with electrode plates, and the semiconductor element is connected to the electrode plates by the semiconductor element and the electrode plates being pressing together.
With this kind of semiconductor module, a positive electrode plate is arranged on a lower surface of the semiconductor module, and a negative electrode plate is arranged on an upper surface of the semiconductor module. Therefore, when mounting this semiconductor module to an apparatus, wiring must be connected to both the upper surface side (i.e., the negative electrode plate side) of the semiconductor module, and the lower surface side (i.e., the positive electrode plate side) of the semiconductor module. However, depending on the mounting environment of the semiconductor module, it may be difficult to ensure space to pull the wiring out, on the upper surface side and/or the lower surface side of the semiconductor module. Therefore, technology that enables the pull-out direction of the wiring to be adjusted according to the mounting environment is desirable.